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SiP41109/41110
New Product
Vishay Siliconix
Half-Bridge N-Channel MOSFET Driver for DC/DC Conversion
FEATURES
D D D D D D D D D PWM With Tri-State Enable 12-V Low-Side Gate Drive (SiP41109) 8-V Low-Side Gate Drive (SiP41110) Undervoltage Lockout Internal Bootstrap Diode Switching Frequency Up to 1 MHz 30-ns Max Propagation Delay Drive MOSFETs In 5- to 48-V Systems Adaptive Shoot-Through Protection
APPLICATIONS
D D D D D Multi-Phase DC/DC Conversion High Current Low Voltage DC/DC Converters High Frequency DC/DC Converters Mobile and Desktop Computer DC/DC Converters Core Voltage Supplies for PC Micro-Processors
DESCRIPTION
The SiP41109 and SiP41110 are high-speed half-bridge MOSFET drivers for use in high frequency, high current, multiphase dc-to-dc synchronous rectifier buck power supplies. They are designed to operate at switching frequencies up to 1 MHz. The high-side driver is bootstrapped to allow driving n-channel MOSFETs. They feature adaptive shoot-through protection to prevent simultaneous conduction of the external MOSFETs. There are two options available for the voltage of the high-side and low-side drivers. In the SiP41109, the regulator supplies gate drive voltage to the high-side driver and VCC supplies the low-side driver. in the SiP41110, the regulator supplies the high- and low-side gate drive voltage. The SiP41109 and SiP41110 are assembled in a lead (Pb)-free 8-pin SOIC package for operation over the industrial operating range (-40 _C to 85 _C).
TYPICAL APPLICATION CIRCUIT
+5 to 48 V +12 V
PVcc
VCC
BOOT
UGATE
SiP41109/41110
Controller PWM (Tri-State) PHASE VOUT
LGATE
GND
GND
GND
Document Number: 73023 S-51104--Rev. A, 13-Jun-05
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SiP41109/41110
Vishay Siliconix
New Product
ABSOLUTE MAXIMUM RATINGS (ALL VOLTAGES REFERENCED TO GND = 0 V)
V CC, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15 V BOOT, PHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 55 V BOOT to PHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15 V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 150_C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125_C Power Dissipationa SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 770 mW Thermal Impedance (QJA)b SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130_C/W Notes a. Device mounted with all leads soldered or welded to PC board. b. Derate 7.7 mW/_C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE (ALL VOLTAGES REFERENCED TO GND = 0 V)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.8 to 13.2 V VLX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 V CBOOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 nF to 1 mF BOOT to PHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 85_C
SPECIFICATIONSa
Test Conditions Unless Specified Parameter Power Supplies
Supply Voltage Quiescent Current Supply Current Tristate (Shutdown) Current VCC ICCQ IDD ICCT PWM Non-Switching fPWM = 100 kHz CLOAD = 3 nF kHz, PWM = Open SiP41109 SiP41110 10.8 5.6 12.5 11.0 850 1200 mA 13.2 9.5 mA V
Limits Mina Typb Maxa Unit
Symbol
VCC = 12 V, VBOOT - VPHASE = 8 V TA = -40 to 85_C
Reference Voltage
Break-Before-Make VBBM 2.5 V
PWM Input
Input High Input Low Bias Current Tristate Threshold High Low VIH VIL IB VTSH VTSL tTST 240 PWM 5 V or 0 V 3.0 2.0 "600 4.0 VCC 1.0 "1000 V mA V ns
Tristate Holdoff Timeoutc
Bootstrap Diode
Forward Voltage VF IF = 40 mA, TA = 25_C 0.70 0.85 1.0 V
MOSFET Drivers
High-Side Drive Currentc IPKH(source) IPKH(sink) IPKL(source) Low-Side Low Side Drive Currentc IPKL(sink) IPKL(source) IPKL(sink) www.vishay.com VBOOT - VPHASE = 8 V VPVCC = 8 V VPVCC = 12 V SiP41110 SiP41109 0.8 1.0 0.9 1.2 1.4 1.8 Document Number: 73023 S-51104--Rev. A, 13-Jun-05 A
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SiP41109/41110
New Product
SPECIFICATIONSa
Test Conditions Unless Specified Parameter MOSFET Drivers
High-Side High Side Driver Impedance RDH(source) RDH(sink) RDL(source) Low-Side Low Side Driver Impedance RDL(sink) RDL(source) RDL(sink) High-Side Rise Time High-Side Fall Time High-Side Rise Time Bypass High-Side Fall Time Bypass High-Side High Side Propagation Delayc td(off)H td(on)H trL L trH tfH VBOOT - VPHASE = 8 V PHASE = GND V, VPVCC = 8 V VPVCC = 12 V SiP41110 SiP41109 2.3 1.9 2.9 1.3 2.4 1.2 45 35 45 35 15 15 SiP41110 SiP41109 SiP41110 SiP41109 40 40 30 30 15 15 ns 4.2 3.5 5.2 2.4 4.3 2.2 W
Vishay Siliconix
Limits Mina Typb Maxa Unit
Symbol
VCC = 12 V, VBOOT - VPHASE = 8 V TA = -40 to 85_C
10% - 90% VBOOT - VPHASE = 8 V, CLOAD = 3 nF 90%, V 10% - 90% VBOOT - VPHASE = 12 V, CLOAD = 3 nF 90%, V See Timing Waveforms 10% - 90%, VBOOT - VPHASE = 8 V CLOAD = 3 nF 10% - 90%, VBOOT - VPHASE = 12 V CLOAD = 3 nF 10% - 90%, VBOOT - VPHASE = 8 V CLOAD = 3 nF 10% - 90%, VBOOT - VPHASE = 12 V CLOAD = 3 nF See Timing Waveforms
Low-Side Low Side Rise Time
Low-Side Low Side Fall Time
tfL td(off)L td(on)L
Low-Side Low Side Propagation Delay
PHASE Timer
PHASE Falling Timeoutc tPHASE 380 ns
PVCC Regulator
Output Voltage Output Current Current Limit Line Regulation Load Regulation PVCC IPVCC ILIM LNR LDR VDRV = 0 V VCC = 10.8 V to 13.2 V 5 mA to 80 mA 120 7.6 8 80 200 0.05 0.1 8.4 100 280 0.5 1.0 V mA %/V %
PVCC Regulator UVLO
PVCC Rising PVCC Falling Hysteresis VUVLO2 Hyst 100 6.7 6.4 300 7.2 6.9 500 V mV
High-Side Undervoltage Lockout
Threshold VUVHS Rising or Falling 2.5 3.35 4.0 V
VCC Undervoltage Lockout
Threshold Power on Reset Time VUVLO1 POR 5.0 5.3 2.5 5.6 V ms
Thermal Shutdown
Temperature Hysteresis TSD TH Temperature Rising Temperature Falling 165 25 _C
Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at VCC = 12 V unless otherwise noted.
Document Number: 73023 S-51104--Rev. A, 13-Jun-05
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SiP41109/41110
Vishay Siliconix
TIMING WAVEFORMS
PWM 50% 90% 10% tfH 90% LGate td(off)H 10% 90% 10% td(on)H 10% trH 50% 90%
New Product
UGate
trL td(off)L
tfL
Phase 2.5 V
td(on)L
PIN CONFIGURATION AND TRUTH TABLE
SO-8
UGATE BOOT PWM GND 1 2 3 4 Top View 8 PHASE PVCC VCC LGATE
TRUTH TABLE
PWM
L H Tri-State
SiP41109 SiP41110
7 6 5
UGATE
L H L
LGATE
H L L
ORDERING INFORMATION
Part Number
SiP41109DY-T1--E3 SiP41110DY-T1--E3
Temperature Range
-40 to 85_C
Marking
41109 41110
Eval Kit
SiP41109DB SiP41110DB
Temperature Range
-40 to 85_C
PIN DESCRIPTION
Pin Number
1 2 3 4 5 6 7 8 www.vishay.com
Name
UGATE BOOT PWM GND LGATE VCC PVCC PHASE 8-V high-side MOSFET gate drive
Function
Bootstrap supply for high-side driver. The bootstap capacitor is connected between BOOT and PHASE. Input signal for the MOSFET drivers and tri-state enable Ground Synchronous or low-side MOSFET gate drive 12-V supply. Connect a bypass capacitor w1 mF from here to ground 8-V Voltage Regulator Output. Connect a bypass capacitor w1 mF from here to ground Connection to source of high-side MOSFET, drain of the low-side MOSFET, and the inductor Document Number: 73023 S-51104--Rev. A, 13-Jun-05
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SiP41109/41110
New Product
FUNCTIONAL BLOCK DIAGRAM
PVCC
Vishay Siliconix
VCC
+8-V Linear Regulator
BOOT
UVLO OTP Linear Regulator +5 V Tri-State Detect - +
UGATE UVLO PHASE
VBBM (2.5 V)
PWM
VDRL LGATE SiP41109 - VDRL = VCC (12 V) SiP41110 - VDRL = PVCC (8 V)
GND
Figure 1.
DETAILED OPERATION
PWM/Tri-State Enable The PWM pin controls the switching of the external MOSFETs. The driver logic operates in a noninverting configuration. The PWM input stage should be driven by a signal with fast transition times, like those provided by a PWM controller or logic gate, (<200 ns). The PWM input functions as a logic input and is not intended for applications where a slow changing input voltage is used to generate a switching output when the input switching threshold voltage is reached. Shutdown The SiP41109/41110 enters shutdown mode when the signal driving PWM enters the tri-state window for more than 240 ns. The shutdown state is removed when the PWM signal moves outside the tri-state window. If the PWM is left open, the pin is held to 2.5 V by an internal voltage divider, thus forcing the tri-state condition. Low-Side Driver In the SiP41109, the low-side driver voltage is supplied by VCC. In the SiP41110, the low-side driver voltage is supplied by PVCC. During shutdown, LGATE is held low. High-Side Driver The high-side driver is isolated from the substrate to create a floating high-side driver so that an n-channel MOSFET can be
Document Number: 73023 S-51104--Rev. A, 13-Jun-05
used for the high-side switch. The high-side driver voltage is supplied by PVCC. The voltage is maintained by a floating bootstrap capacitor, which is continually recharged by the switching action of the output. During shutdown UGATE is held low. Gate Drive Voltage (PVCC) Regulator An integrated 80-mA, 8-V regulator supplies voltage to the PVCC pin and it current limits at 200 mA typical when the output is shorted to ground. A capacitor (1 mF minimum) must be connected to the PVCC pin to stabilize the regulator output. The voltage on PVCC is supplied to the integrated bootstrap diode. PVCC is used to recharge the bootstrap capacitor and powers the SiP41110 low-side driver. PVCC pin can be externally connected to VCC to bypass the 8-V regulator and increase high-side gate drive to 12 V. If the PVCC pin is connected to VCC the system voltage should not exceed 43V. Bootstrap Circuit The internal bootstrap diode and an external bootstrap capacitor supply voltage to the BOOT pin. An integrated bootstrap diode replaces the external diode normally needed for the bootstrap circuit; only a capacitor is necessary to complete the bootstrap circuit. The bootstrap capacitor is sized according to,
CBOOT = (QGATE/(DVBOOT - VPHASE)) x 10
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SiP41109/41110
Vishay Siliconix
New Product
where QGATE is the gate charge needed to turn on the high-side MOSFET and DVBOOT - PHASE is the amount of droop allowed in the bootstrapped supply voltage when the high-side MOSFET is driven high. The bootstrap capacitor value is typically 0.1 mF to 1 mF. The bootstrap capacitor voltage rating must be greater than VCC + 12 V to withstand transient spikes and ringing. Shoot-Through Protection The external MOSFETs are prevented from conducting at the same time during transitions. Break-before-make circuits monitor the voltages on the PHASE pin and the LGATE pin and control the switching as follows: When the signal on PWM goes low, UGATE will go low after an internal propagation delay. After the voltage on PHASE falls below 2.5 V by the inductor action, the low-side driver is enabled and LGATE goes high after some delay. When the signal on PWM goes high, LGATE will go low after an internal propagation delay. After the voltage on LGATE drops below 2.5 V the high-side driver is enabled and UGATE will go high after an internal propagation delay. If PHASE does not drop below 2.5 V within 380 ns after UGATE goes low, LGATE is forced high until the next PWM transition.
VCC Bypass Capacitor MOSFET drivers draw large peak currents from the supplies when they switch. A local bypass capacitor is required to supply this current and reduce power supply noise. Connect a 1-mF ceramic capacitor as close as practical between the VCC and GND pins. Undervoltage Lockout Undervoltage lockout prevents control of the circuit until the supply voltages reach valid operating levels. The UVLO circuit forces LGATE and UGATE to low when VCC is below its specified voltage. A separate UVLO forces UGATE low when the voltage between BOOT and PHASE is below the specified voltage. Thermal Protection If the die temperature rises above 165_C, the thermal protection disables the drivers. The drivers are re-enabled after the die temperature has decreased below 140_C.
TYPICAL CHARACTERISTICS
105 95 85 75 ICC (mA)
ICC vs. CLOAD vs. Frequency (SiP41109)
VCC = 12 V
100 90 80 70 ICC (mA) 60 50 40 30 20 10 0
ICC vs. CLOAD vs. Frequency (SiP41110)
VCC = 12 V
65 55 45 35 25 15 5 0 1 2 3 4 5 CLOAD (nF) 200 kHz 1 MHz 500 kHz
1 MHz
500 kHz 200 kHz
0
1
2
3
4
5
CLOAD (nF)
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Document Number: 73023 S-51104--Rev. A, 13-Jun-05
SiP41109/41110
New Product
TYPICAL WAVEFORMS
Vishay Siliconix
Figure 2.
PWM Signal vs. HS Gate, LS Gate and PHASE (Rising)
PWM 5 V/div UGate 20 V/div
Figure 3.
PWM Signal vs. HS Gate, LS Gate and PHASE (Falling)
PWM 5 V/div UGate 20 V/div
LGate 10 V/div
LGate 10 V/div
VPHASE 10 V/div
VPHASE 10 V/div 40 ns/div
40 ns/div
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?73023. Document Number: 73023 S-51104--Rev. A, 13-Jun-05 www.vishay.com
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